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Developed components of Intel Time Coordinated Computing Tools — SDK enabling hardware features for real-time and low-latency industrial applications on Linux.
Designed and implemented Cache Allocation Library — a malloc-like library for allocating memory pinned in L2/L3 cache using Cache Allocation Technology (CAT); achieved high unit test coverage prior to hardware availability, enabling near-immediate bring-up on dev boards.
Created Cache Configurator — Python TUI tool for cache partitioning and BIOS capsule generation, used by the Cache Allocation Library.
Developed RT Readiness Checker — Python and C tool to validate BIOS and OS settings for real-time operation (C-states, Hyper-Threading, etc.).
Mentored interns and junior developers on Cache Configurator and RT Readiness Checker; supervised student project during Intel Summer Internship program.
Promoted adoption of Python type hints across the team, reducing defects; delivered internal training session on the topic.
Built and validated low-level hardware samples for TSN and Time Aware GPIO (TGPIO), identifying kernel driver issues and proposing fixes.

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